PLL

基本解釋

It offers Dolby C, a PLL servo mechanism.
它提供了對(duì)杜比C降噪的支持。
The phase noise of PLL is?88.83 dBc/Hz at 10kHz offset.
37GHz的單片鎖相環(huán)電路的鎖定范圍為32MHz;鎖定時(shí)在偏離中心頻率10kHz處的相位噪聲為-88.;83dBc/Hz。
Understand clock synchronization using phase-lock loop (PLL).
理解用鎖相環(huán)（PLL）實(shí)現(xiàn)時(shí)鐘同步。
VCO is the major contributor of the PLL output noise.
壓控振蕩器是鎖相環(huán)噪聲的主要來(lái)源。
How will it be happened when IO port is set to output and internal PLL HIGH?
當(dāng)Port7設(shè)定成輸出且啟動(dòng)內(nèi)部上拉電阻時(shí),會(huì)發(fā)生什么情形?