bit synchronous

基本解釋

This paper discusses extraction of the bit-synchronous signal with a first-order ADPLL mainly.
本文主要以一階環(huán)為例討論位同步信號提取。
The digital realization of monostable circuit and extraction of bit-synchronous signal with digital phase lock loop are also introduced in detail.
對于其中的單穩(wěn)態(tài)電路的數字化和數字鎖相環(huán)提取位同步信號也進行了詳細的設計說明。
Bit synchronous clock recover circuit is the key part of the communication system, it can exactly recover the synchronous signal from input data stream.
位同步時鐘信號的提取是通信系統中的關鍵部分，應用數字鎖相環(huán)可以準確地從輸入碼流中提取出位同步信號。