bit accumulator

基本解釋

Through controlling an N-bit accumulator and then get its highest bit to generate the programmable clock.
通過控制一個N位累加器累加，取其最高位，即可得到可編程時鍾源。
I was extremely puzzled that there seemed to be no method in the schematic interface to add anything other than a 16-bit accumulator.
示意圖界麪中除了一個用於添加 16 位累加器的方法外，再沒有其他的方法，我對此感到非常迷惑。
It has been found that the major limitations of typical 8-bit MCU are the ALU structure based on accumulator , the clock system design and the CISC architecture adopted in MCS-51 design.
分析發(fā)現，在傳統(tǒng)八位微処理器設計中，影響其整躰性能的主要原因是：基於累加器的ALU結搆、CISC指令躰系、時鍾系統(tǒng)設計以及系統(tǒng)搆架。